Click here to return to the VHDL Reference Guide. (last edit: 24. september 2012)

Concurrent Statement

A statement which is concurrent with respect to all other such statements.
The following are concurrent statements:
  • Process
  • Instantiation
  • Signal assignment
  • Generate
  • Assert
  • Procedure call
  • Block

Where 

  entity-begin-HERE-end
  architecture-begin-HERE-end
  block-begin-HERE-end
  generate-begin-HERE-end

Rules

The concurrent signal assignment, concurrent assert and concurrent procedure call are defined in terms of equivalent process statements. Thus, their labels are optional, and they may be postponed.

See Also

Sequential Statement